Make a very simple test for me

[pc1966]

But you are still limited by the maximum IC fv. Higher than its maximum and you are in the same situation as I am.

You are always limited by the IC's max frequency!

it is just that can vary from sub-MHz (e.g. 4000B series CMOS at lower voltages) to many GHz in the case of GaAs pre-scaler ICs.

Btw, what is he maximum fv it can see this 74LS93 ? Actually I will check it as well.

The LS93 has two divider, the first is a single stage, the 2nd a 3-stage counter. Typically you clock the first and use its output to clock the 2nd for max dividing ratio.

A check in the data sheet shows this:

https://www.ti.com/lit/ds/symlink/sn74ls93.pdf

Also they show the logic for the LS90 (BCD = 10) and LS92 (divide 12).

 

[marconi]

CP1 is half of CP0 because generally one uses the first one bit flip flop to to feed the remaining 3 flip flops. It is only the first ff which has to operate at fv. The output of the first ff is fv/2. It is why this ic is arranged as one 1 bit stage and one 3 bit stages. The emphasis on fv operating speed only has to be for one ff. Division by 2 is a sizeable reduction after all. The second set of ffs can do the next division factor operating at a lower speed.

 

[Lucien Nunes]

What a strange project. I really didnt want to spent even 2h on it, and it turn out to spent 2 months, haha. Strange, right?

As frequency increases, things get harder to engineer. One of the first uses of electronics in the tens of MHz was TV transmission. In the 1930s, very few active components could work at these frequencies. The next use to push the boundaries was RADAR, which at the beginning of WW2 found a practical limit of 200MHz with a 45MHz IF. But I cannot stress enough how difficult it was to work at these frequencies. When the airborne RADAR development team were first experimenting, they only had one IF strip that worked well enough and none of the big electronics manufacturers they approached initially could equal its performance at 45MHz. It took years of collaboration between valve makers and circuit designers to break through these boundaries.

The valve was developed to a high level of performance, then the transistor came along with lots of promise but in some ways very limited specs. A whole new development cycle began to enable the transistor to achieve some of the performance that was by then easy with valves. Then with the arrival of a whole spectrum of IC technologies, one could find a performance point that suited the application (e.g. 4000 CMOS - slow but low power, ECL - fast but power-hungry.) But the fundamental physical limitations on conductor lengths (due to capacitance and impedance), dielectric losses etc still remain today.

At hundreds of MHz, small things matter. If the leads of a component or interconnect are too long they behave like transmission lines, with wavefronts bouncing backwards and forwards and corrupting signals unless impedances are matched. Look at any recent computer motherboard and you will see design features in the PCB layout for working at high frequencies. For example, placement of components to minimise inductance and capacitance, balanced transmission lines e.g. for PCI lanes and trace meanders to adjust signal timing. In the GHz you can find multiple wavefronts flowing down a long trace - a logic 1 might be nearly at the destination but a logic 0 is following a few centimetres behind it. The trace is at different logic states in different places due to the finite propagation velocity.

So when you build something that works at 100MHz, remember that in my father's lifetime, some of the best electronic engineers in the world, with all the leverage of a military trying to get ahead of a growing threat, couldn't make 100MHz amplifiers work at all.

 

[_q12x_]

Oh, wow, very nice explanations ! All 3 of you. I really enjoy reading them. Hmmm.... I knew 100MHz is fast but now when I get it from you im thinking maybe I am pushing too far. Ive always loved extremities. Then what is a 'normal' limit that everyone is comfortable, what is the standard? If not 100MHz then what? 50MHz? I want to tell me from your experience ! Or it might be dictated only by the IC you use and have in hand, it's limit, like in my case with the 555 and @marconi with the 74LS93 and @pc1966 with its 74HC4060. And the fastest IC out there, will dictate my max speed at which I can measure my OSX's. I suppose this is the 'normal' practical way of looking at it. Huh... I didn't stay before and think too much on this line of thought, but now is becoming very logical for me. Or at least this is my piece of mind. Im curious whats yours ?

 

[_q12x_]

I'm usually very careful but this time I goof it. I misread the datasheet part number, believing it is for 74LS00, but it was for SN5400!!! You recommend it as 74LS00 datasheet and I took it for granted. Aahh. I should have being more careful.

So, here is the corrected pinout of the 7400 IC:

The ? chip there is the SN5400 pinout.
This particular SN5400 datasheet is mentioning, very confusingly I may add, the SN74LS00 in it's corner title.
That's the reason mister @marconi misread it, and also I as well. Damn. Live and learn I guess. I hate stupid mistakes like these. We all do it I suppose at a time or the other.

So this is my concluded correction.
Btw, here is the correct datasheet link for 74LS00: https://www.futurlec.com/Datasheet/74ls/74LS00.pdf
I also noticed the google search is a tiny bit confusing, popping out the SN5400 as an immediate alternative, which we took it again, for granted.

 

[_q12x_]

This morning I received mister @marconi package.
And I quickly built up this circuit:

and I got this result/reading:

I used the exact values in the circuit, 20MHz osc, 100pF cap and mister @marconi 's 74LS00 IC.

2^21 = 2097152
-------- 3703379 (my result on the fv counter)
2^22 = 4194304
I believe I should have get a 2^x value in there and not in between.
Im not sure what value to expect really since its my first time using these logic circuits.

I built a test circuit, a very basic one, to understand how much a single gate is dividing.
I used my original 555 PWM circuit.

In conclusion, I got the same output with the input I was feeding.
I input 840Hz, I output 840Hz. WOW !!!
The breadboard circuit is exactly as the circuit schematic in the 1st picture for this experiment. I even grounded (yellow links) the unused input gates which are also linked together. I even put a filtering 100nF brand new cap on the output PWM into the first input gates. (the yellow capacitor) near the green positive link.
- What do I miss ? I don't get it.
Mister marconi give me a continuation circuit for the first osc circuit. I'll built that next. But I must say, I got very weird results so far.

 

[pc1966]

This particular SN5400 datasheet is mentioning, very confusingly I may add, the SN74LS00 in it's corner title.

The only difference is temperature range (and use of ceramic packaing to achieve that). The 54xx series has the full -55C to +125C military range where as the 74xx series is 0C to 70C commercial range

 

[pc1966]

View attachment 98015
So this is my concluded correction.

That is the 'SO' surface mount package (confusingly saying 18 pin but clearly only 14!), your schematic was showing the DIP package pin out.

Difference is in the DIP package Vcc/Gnd are corner pins, on SMT they are mid-way.

 

[pc1966]

This morning I received mister @marconi package.
And I quickly built up this circuit:
View attachment 98017 View attachment 98018 View attachment 98020
and I got this result/reading:
View attachment 98021
I used the exact values in the circuit, 20MHz osc, 100pF cap and mister @marconi 's 74LS00 IC.

No decoupling capacitor!

While not always show at the IC on schematics, any fast logic design needs something like 10nF - 100nF ceramic capacitor close to the Vcc/Gnd pins of each IC or couple of ICs (maybe less if ground plane board used, etc).

You need them to keep the supply impedance down at the ~5ns switching speed of the device, that means short leads close to the IC. If you have some ceramic cap in the 10nF-100nF range (value not too critical), try straddling the IC from pins 7-14 of the oscillator and see if it changes behaviour.

 

[_q12x_]

Here is some update on the progress:

 

[_q12x_]

My new fv divider:

But I need a special cable that goes into fv counter, instead of those 2 (very short) wires.
Something like an osciloscope wire that is shielded is my very best guess.

I need you to tell me whats their principle and then to be able to apply it for my device here!

 

[marconi]

I thought I would report my progress in a short video clip showing a 40MHz crystal oscillator signal being divided by 100 to produce 400kHz pulse train. I assess my achievement as quite modest compared to what q12x has produced with fewer resources and I hope he will show in a short video clip.

 

[_q12x_]

@pc1966 the 74HC4060 has arrived today.
I think I buy them for greater fv reach than the 74LS293 I originally used.

 

[_q12x_]

The fv splitter is made already, so... theoretically, if I change 74LS293 in it with the new 74HC4060, should get better at reading higher fv's. Correct?